SoC Capabilities

This section lists definitions of the ESP32-S3’s SoC hardware capabilities. These definitions are commonly used in IDF to control which hardware dependent features are supported and thus compiled into the binary.

Note

These defines are currently not considered to be part of the public API, and may be changed at any time.

API Reference

Header File

Macros

SOC_ADC_SUPPORTED
SOC_PCNT_SUPPORTED
SOC_WIFI_SUPPORTED
SOC_TWAI_SUPPORTED
SOC_GDMA_SUPPORTED
SOC_LCDCAM_SUPPORTED
SOC_MCPWM_SUPPORTED
SOC_DEDICATED_GPIO_SUPPORTED
SOC_CACHE_SUPPORT_WRAP
SOC_ULP_SUPPORTED
SOC_RISCV_COPROC_SUPPORTED
SOC_BT_SUPPORTED
SOC_USB_OTG_SUPPORTED
SOC_USB_SERIAL_JTAG_SUPPORTED
SOC_CCOMP_TIMER_SUPPORTED
SOC_ASYNC_MEMCPY_SUPPORTED
SOC_SUPPORTS_SECURE_DL_MODE
SOC_EFUSE_KEY_PURPOSE_FIELD
SOC_SDMMC_HOST_SUPPORTED
SOC_RTC_FAST_MEM_SUPPORTED
SOC_RTC_SLOW_MEM_SUPPORTED
SOC_RTC_MEM_SUPPORTED
SOC_PSRAM_DMA_CAPABLE
SOC_XT_WDT_SUPPORTED
SOC_I2S_SUPPORTED
SOC_RMT_SUPPORTED
SOC_SDM_SUPPORTED
SOC_LEDC_SUPPORTED
SOC_I2C_SUPPORTED
SOC_SYSTIMER_SUPPORTED
SOC_SUPPORT_COEXISTENCE
SOC_TEMP_SENSOR_SUPPORTED
SOC_AES_SUPPORTED
SOC_MPI_SUPPORTED
SOC_SHA_SUPPORTED
SOC_HMAC_SUPPORTED
SOC_DIG_SIGN_SUPPORTED
SOC_FLASH_ENC_SUPPORTED
SOC_SECURE_BOOT_SUPPORTED
SOC_MEMPROT_SUPPORTED
SOC_TOUCH_SENSOR_SUPPORTED
SOC_XTAL_SUPPORT_40M
SOC_APPCPU_HAS_CLOCK_GATING_BUG
SOC_ADC_RTC_CTRL_SUPPORTED

< SAR ADC Module

SOC_ADC_DIG_CTRL_SUPPORTED
SOC_ADC_ARBITER_SUPPORTED
SOC_ADC_FILTER_SUPPORTED
SOC_ADC_MONITOR_SUPPORTED
SOC_ADC_DMA_SUPPORTED
SOC_ADC_PERIPH_NUM
SOC_ADC_CHANNEL_NUM(PERIPH_NUM)
SOC_ADC_MAX_CHANNEL_NUM
SOC_ADC_ATTEN_NUM

Digital

SOC_ADC_DIGI_CONTROLLER_NUM
SOC_ADC_PATT_LEN_MAX
SOC_ADC_DIGI_MIN_BITWIDTH
SOC_ADC_DIGI_MAX_BITWIDTH
SOC_ADC_DIGI_RESULT_BYTES
SOC_ADC_DIGI_DATA_BYTES_PER_CONV

F_sample = F_digi_con / 2 / interval. F_digi_con = 5M for now. 30 <= interva <= 4095

SOC_ADC_SAMPLE_FREQ_THRES_HIGH
SOC_ADC_SAMPLE_FREQ_THRES_LOW

RTC

SOC_ADC_RTC_MIN_BITWIDTH
SOC_ADC_RTC_MAX_BITWIDTH

Calibration

SOC_ADC_CALIBRATION_V1_SUPPORTED

support HW offset calibration version 1

SOC_APB_BACKUP_DMA
SOC_BROWNOUT_RESET_SUPPORTED
SOC_MMU_LINEAR_ADDRESS_REGION_NUM
SOC_CPU_CORES_NUM
SOC_CPU_INTR_NUM
SOC_CPU_HAS_FPU
SOC_CPU_BREAKPOINTS_NUM
SOC_CPU_WATCHPOINTS_NUM
SOC_CPU_WATCHPOINT_SIZE
SOC_DS_SIGNATURE_MAX_BIT_LEN

The maximum length of a Digital Signature in bits.

SOC_DS_KEY_PARAM_MD_IV_LENGTH

Initialization vector (IV) length for the RSA key parameter message digest (MD) in bytes.

SOC_DS_KEY_CHECK_MAX_WAIT_US

Maximum wait time for DS parameter decryption key. If overdue, then key error. See TRM DS chapter for more details

SOC_GDMA_GROUPS
SOC_GDMA_PAIRS_PER_GROUP
SOC_GDMA_SUPPORT_PSRAM
SOC_GDMA_PSRAM_MIN_ALIGN
SOC_GPIO_PORT
SOC_GPIO_PIN_COUNT
SOC_GPIO_SUPPORT_RTC_INDEPENDENT
SOC_GPIO_SUPPORT_FORCE_HOLD
SOC_GPIO_VALID_GPIO_MASK
SOC_GPIO_VALID_OUTPUT_GPIO_MASK
SOC_GPIO_VALID_DIGITAL_IO_PAD_MASK
SOC_GPIO_SUPPORT_SLP_SWITCH
SOC_DEDIC_GPIO_OUT_CHANNELS_NUM

8 outward channels on each CPU core

SOC_DEDIC_GPIO_IN_CHANNELS_NUM

8 inward channels on each CPU core

SOC_DEDIC_GPIO_OUT_AUTO_ENABLE

Dedicated GPIO output attribution is enabled automatically

SOC_I2C_NUM
SOC_I2C_FIFO_LEN

I2C hardware FIFO depth

SOC_I2C_SUPPORT_SLAVE
SOC_I2C_SUPPORT_HW_CLR_BUS
SOC_I2C_SUPPORT_XTAL
SOC_I2C_SUPPORT_RTC
SOC_I2S_NUM
SOC_I2S_HW_VERSION_2
SOC_I2S_SUPPORTS_XTAL
SOC_I2S_SUPPORTS_PCM
SOC_I2S_SUPPORTS_PDM
SOC_I2S_SUPPORTS_PDM_TX
SOC_I2S_PDM_MAX_TX_LINES
SOC_I2S_SUPPORTS_PDM_RX
SOC_I2S_PDM_MAX_RX_LINES
SOC_I2S_SUPPORTS_TDM
SOC_MCPWM_GROUPS

2 MCPWM groups on the chip (i.e., the number of independent MCPWM peripherals)

SOC_MCPWM_TIMERS_PER_GROUP

The number of timers that each group has.

SOC_MCPWM_OPERATORS_PER_GROUP

The number of operators that each group has.

SOC_MCPWM_COMPARATORS_PER_OPERATOR

The number of comparators that each operator has.

SOC_MCPWM_GENERATORS_PER_OPERATOR

The number of generators that each operator has.

SOC_MCPWM_TRIGGERS_PER_OPERATOR

The number of triggers that each operator has.

SOC_MCPWM_GPIO_FAULTS_PER_GROUP

The number of fault signal detectors that each group has.

SOC_MCPWM_CAPTURE_TIMERS_PER_GROUP

The number of capture timers that each group has.

SOC_MCPWM_CAPTURE_CHANNELS_PER_TIMER

The number of capture channels that each capture timer has.

SOC_MCPWM_GPIO_SYNCHROS_PER_GROUP

The number of GPIO synchros that each group has.

SOC_MCPWM_SWSYNC_CAN_PROPAGATE

Software sync event can be routed to its output.

SOC_MCPWM_CLK_SUPPORT_PLL160M

Support PLL160M as clock source.

SOC_PCNT_GROUPS
SOC_PCNT_UNITS_PER_GROUP
SOC_PCNT_CHANNELS_PER_UNIT
SOC_PCNT_THRES_POINT_PER_UNIT
SOC_RMT_GROUPS

One RMT group

SOC_RMT_TX_CANDIDATES_PER_GROUP

Number of channels that capable of Transmit in each group

SOC_RMT_RX_CANDIDATES_PER_GROUP

Number of channels that capable of Receive in each group

SOC_RMT_CHANNELS_PER_GROUP

Total 8 channels

SOC_RMT_MEM_WORDS_PER_CHANNEL

Each channel owns 48 words memory (1 word = 4 Bytes)

SOC_RMT_SUPPORT_RX_PINGPONG

Support Ping-Pong mode on RX path

SOC_RMT_SUPPORT_RX_DEMODULATION

Support signal demodulation on RX path (i.e. remove carrier)

SOC_RMT_SUPPORT_TX_ASYNC_STOP

Support stop transmission asynchronously

SOC_RMT_SUPPORT_TX_LOOP_COUNT

Support transmit specified number of cycles in loop mode

SOC_RMT_SUPPORT_TX_LOOP_AUTO_STOP

Hardware support of auto-stop in loop mode

SOC_RMT_SUPPORT_TX_SYNCHRO

Support coordinate a group of TX channels to start simultaneously

SOC_RMT_SUPPORT_TX_CARRIER_DATA_ONLY

TX carrier can be modulated to data phase only

SOC_RMT_SUPPORT_XTAL

Support set XTAL clock as the RMT clock source

SOC_RMT_SUPPORT_RC_FAST

Support set RC_FAST clock as the RMT clock source

SOC_RMT_SUPPORT_APB

Support set APB as the RMT clock source

SOC_RMT_SUPPORT_DMA

RMT peripheral can connect to DMA channel

SOC_LCD_I80_SUPPORTED

Intel 8080 LCD is supported

SOC_LCD_RGB_SUPPORTED

RGB LCD is supported

SOC_LCD_I80_BUSES

Has one LCD Intel 8080 bus

SOC_LCD_RGB_PANELS

Support one RGB LCD panel

SOC_LCD_I80_BUS_WIDTH

Intel 8080 bus width

SOC_LCD_RGB_DATA_WIDTH

Number of LCD data lines

SOC_LCD_SUPPORT_RGB_YUV_CONV

Support color format conversion between RGB and YUV

SOC_RTC_CNTL_CPU_PD_DMA_BUS_WIDTH
SOC_RTC_CNTL_CPU_PD_REG_FILE_NUM
SOC_RTC_CNTL_CPU_PD_DMA_ADDR_ALIGN
SOC_RTC_CNTL_CPU_PD_DMA_BLOCK_SIZE
SOC_RTC_CNTL_CPU_PD_RETENTION_MEM_SIZE
SOC_RTC_CNTL_TAGMEM_PD_DMA_BUS_WIDTH
SOC_RTC_CNTL_TAGMEM_PD_DMA_ADDR_ALIGN
SOC_RTCIO_PIN_COUNT
SOC_RTCIO_INPUT_OUTPUT_SUPPORTED
SOC_RTCIO_HOLD_SUPPORTED
SOC_RTCIO_WAKE_SUPPORTED
SOC_SDM_GROUPS
SOC_SDM_CHANNELS_PER_GROUP
SOC_SPI_PERIPH_NUM
SOC_SPI_PERIPH_CS_NUM(i)
SOC_SPI_MAX_CS_NUM
SOC_SPI_MAXIMUM_BUFFER_SIZE
SOC_SPI_SUPPORT_DDRCLK
SOC_SPI_SLAVE_SUPPORT_SEG_TRANS
SOC_SPI_SUPPORT_CD_SIG
SOC_SPI_SUPPORT_CONTINUOUS_TRANS
SOC_SPI_SUPPORT_SLAVE_HD_VER2
SOC_SPI_PERIPH_SUPPORT_MULTILINE_MODE(host_id)
SOC_SPI_PERIPH_SUPPORT_CONTROL_DUMMY_OUT
SOC_MEMSPI_IS_INDEPENDENT
SOC_SPI_MAX_PRE_DIVIDER
SOC_SPI_SUPPORT_OCT
SOC_MEMSPI_SRC_FREQ_120M
SOC_MEMSPI_SRC_FREQ_80M_SUPPORTED
SOC_MEMSPI_SRC_FREQ_40M_SUPPORTED
SOC_MEMSPI_SRC_FREQ_20M_SUPPORTED
SOC_SPIRAM_SUPPORTED
SOC_SPIRAM_XIP_SUPPORTED
SOC_SYSTIMER_COUNTER_NUM
SOC_SYSTIMER_ALARM_NUM
SOC_SYSTIMER_BIT_WIDTH_LO
SOC_SYSTIMER_BIT_WIDTH_HI
SOC_SYSTIMER_FIXED_DIVIDER
SOC_SYSTIMER_INT_LEVEL
SOC_SYSTIMER_ALARM_MISS_COMPENSATE
SOC_TIMER_GROUPS
SOC_TIMER_GROUP_TIMERS_PER_GROUP
SOC_TIMER_GROUP_COUNTER_BIT_WIDTH
SOC_TIMER_GROUP_SUPPORT_XTAL
SOC_TIMER_GROUP_SUPPORT_APB
SOC_TIMER_GROUP_TOTAL_TIMERS
SOC_TOUCH_VERSION_2
SOC_TOUCH_SENSOR_NUM
SOC_TOUCH_PROXIMITY_CHANNEL_NUM
SOC_TOUCH_PROXIMITY_MEAS_DONE_SUPPORTED
SOC_TOUCH_PAD_THRESHOLD_MAX

If set touch threshold max value, The touch sensor can’t be in touched status

SOC_TOUCH_PAD_MEASURE_WAIT_MAX

The timer frequency is 8Mhz, the max value is 0xff

SOC_TWAI_CONTROLLER_NUM
SOC_TWAI_CLK_SUPPORT_APB
SOC_TWAI_BRP_MIN
SOC_TWAI_BRP_MAX
SOC_TWAI_SUPPORTS_RX_STATUS
SOC_UART_NUM
SOC_UART_FIFO_LEN

The UART hardware FIFO length

SOC_UART_BITRATE_MAX

Max bit rate supported by UART

SOC_UART_SUPPORT_FSM_TX_WAIT_SEND
SOC_UART_SUPPORT_WAKEUP_INT

Support UART wakeup interrupt

SOC_UART_SUPPORT_APB_CLK

Support APB as the clock source

SOC_UART_SUPPORT_RTC_CLK

Support RTC clock as the clock source

SOC_UART_SUPPORT_XTAL_CLK

Support XTAL clock as the clock source

SOC_UART_REQUIRE_CORE_RESET
SOC_USB_PERIPH_NUM
SOC_SHA_DMA_MAX_BUFFER_SIZE
SOC_SHA_SUPPORT_DMA
SOC_SHA_SUPPORT_RESUME
SOC_SHA_GDMA
SOC_SHA_SUPPORT_SHA1
SOC_SHA_SUPPORT_SHA224
SOC_SHA_SUPPORT_SHA256
SOC_SHA_SUPPORT_SHA384
SOC_SHA_SUPPORT_SHA512
SOC_SHA_SUPPORT_SHA512_224
SOC_SHA_SUPPORT_SHA512_256
SOC_SHA_SUPPORT_SHA512_T
SOC_RSA_MAX_BIT_LEN
SOC_AES_SUPPORT_DMA
SOC_AES_GDMA
SOC_AES_SUPPORT_AES_128
SOC_AES_SUPPORT_AES_256
SOC_PM_SUPPORT_EXT_WAKEUP
SOC_PM_SUPPORT_WIFI_WAKEUP
SOC_PM_SUPPORT_BT_WAKEUP
SOC_PM_SUPPORT_CPU_PD
SOC_PM_SUPPORT_TAGMEM_PD
SOC_PM_SUPPORT_RTC_PERIPH_PD
SOC_PM_SUPPORT_TOUCH_SENSOR_WAKEUP

Supports waking up from touch pad trigger

SOC_PM_SUPPORT_DEEPSLEEP_CHECK_STUB_ONLY
SOC_CLK_RC_FAST_D256_SUPPORTED
SOC_RTC_SLOW_CLK_SUPPORT_RC_FAST_D256
SOC_SECURE_BOOT_V2_RSA
SOC_EFUSE_SECURE_BOOT_KEY_DIGESTS
SOC_EFUSE_REVOKE_BOOT_KEY_DIGESTS
SOC_SUPPORT_SECURE_BOOT_REVOKE_KEY
SOC_FLASH_ENCRYPTED_XTS_AES_BLOCK_MAX
SOC_FLASH_ENCRYPTION_XTS_AES
SOC_FLASH_ENCRYPTION_XTS_AES_OPTIONS
SOC_FLASH_ENCRYPTION_XTS_AES_128
SOC_FLASH_ENCRYPTION_XTS_AES_256
SOC_MEMPROT_CPU_PREFETCH_PAD_SIZE
SOC_MEMPROT_MEM_ALIGN_SIZE
SOC_PHY_DIG_REGS_MEM_SIZE
SOC_MAC_BB_PD_MEM_SIZE
SOC_WIFI_LIGHT_SLEEP_CLK_WIDTH
SOC_SPI_MEM_SUPPORT_AUTO_WAIT_IDLE
SOC_SPI_MEM_SUPPORT_AUTO_SUSPEND
SOC_SPI_MEM_SUPPORT_AUTO_RESUME
SOC_SPI_MEM_SUPPORT_SW_SUSPEND
SOC_SPI_MEM_SUPPORT_OPI_MODE
SOC_SPI_MEM_SUPPORT_TIME_TUNING
SOC_SPI_MEM_SUPPORT_CONFIG_GPIO_BY_EFUSE
SOC_COEX_HW_PTI
SOC_SDMMC_USE_GPIO_MATRIX
SOC_SDMMC_NUM_SLOTS
SOC_SDMMC_SUPPORT_XTAL_CLOCK
SOC_TEMPERATURE_SENSOR_SUPPORT_FAST_RC
SOC_WIFI_HW_TSF

Support hardware TSF

SOC_WIFI_FTM_SUPPORT

Support FTM

SOC_WIFI_GCMP_SUPPORT

Support GCMP(GCMP128 and GCMP256)

SOC_WIFI_WAPI_SUPPORT

Support WAPI

SOC_WIFI_CSI_SUPPORT

Support CSI

SOC_WIFI_MESH_SUPPORT

Support WIFI MESH

SOC_BLE_SUPPORTED

Support Bluetooth Low Energy hardware

SOC_BLE_MESH_SUPPORTED

Support BLE MESH