SoC 功能
此文档介绍了 ESP32 SoC 硬件功能的宏定义。ESP-IDF 中的条件编译指令通常使用这些宏来确定哪些依赖于硬件的功能受到支持,从而控制需编译的代码内容。
备注
目前,这些宏定义不属于公共 API,未来可能发生重大更改。如需了解详情,请前往 ESP-IDF 版本简介。
API 参考
Header File
This header file can be included with:
#include "soc/soc_caps.h"
Macros
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SOC_CAPS_ECO_VER_MAX
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SOC_ADC_SUPPORTED
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SOC_DAC_SUPPORTED
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SOC_UART_SUPPORTED
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SOC_MCPWM_SUPPORTED
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SOC_GPTIMER_SUPPORTED
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SOC_SDMMC_HOST_SUPPORTED
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SOC_BT_SUPPORTED
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SOC_PCNT_SUPPORTED
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SOC_PHY_SUPPORTED
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SOC_WIFI_SUPPORTED
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SOC_SDIO_SLAVE_SUPPORTED
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SOC_TWAI_SUPPORTED
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SOC_EFUSE_SUPPORTED
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SOC_EMAC_SUPPORTED
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SOC_ULP_SUPPORTED
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SOC_CCOMP_TIMER_SUPPORTED
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SOC_RTC_FAST_MEM_SUPPORTED
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SOC_RTC_SLOW_MEM_SUPPORTED
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SOC_RTC_MEM_SUPPORTED
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SOC_I2S_SUPPORTED
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SOC_RMT_SUPPORTED
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SOC_SDM_SUPPORTED
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SOC_GPSPI_SUPPORTED
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SOC_LEDC_SUPPORTED
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SOC_I2C_SUPPORTED
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SOC_SUPPORT_COEXISTENCE
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SOC_AES_SUPPORTED
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SOC_MPI_SUPPORTED
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SOC_SHA_SUPPORTED
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SOC_FLASH_ENC_SUPPORTED
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SOC_SECURE_BOOT_SUPPORTED
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SOC_TOUCH_SENSOR_SUPPORTED
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SOC_BOD_SUPPORTED
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SOC_ULP_FSM_SUPPORTED
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SOC_CLK_TREE_SUPPORTED
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SOC_MPU_SUPPORTED
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SOC_WDT_SUPPORTED
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SOC_SPI_FLASH_SUPPORTED
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SOC_RNG_SUPPORTED
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SOC_LIGHT_SLEEP_SUPPORTED
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SOC_DEEP_SLEEP_SUPPORTED
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SOC_LP_PERIPH_SHARE_INTERRUPT
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SOC_PM_SUPPORTED
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SOC_DPORT_WORKAROUND
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SOC_DPORT_WORKAROUND_DIS_INTERRUPT_LVL
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SOC_XTAL_SUPPORT_26M
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SOC_XTAL_SUPPORT_40M
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SOC_XTAL_SUPPORT_AUTO_DETECT
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SOC_ADC_RTC_CTRL_SUPPORTED
< SAR ADC Module
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SOC_ADC_DIG_CTRL_SUPPORTED
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SOC_ADC_DMA_SUPPORTED
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SOC_ADC_DIG_SUPPORTED_UNIT(UNIT)
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SOC_ADC_PERIPH_NUM
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SOC_ADC_CHANNEL_NUM(PERIPH_NUM)
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SOC_ADC_MAX_CHANNEL_NUM
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SOC_ADC_ATTEN_NUM
Digital
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SOC_ADC_DIGI_CONTROLLER_NUM
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SOC_ADC_PATT_LEN_MAX
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SOC_ADC_DIGI_MIN_BITWIDTH
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SOC_ADC_DIGI_MAX_BITWIDTH
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SOC_ADC_DIGI_RESULT_BYTES
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SOC_ADC_DIGI_DATA_BYTES_PER_CONV
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SOC_ADC_DIGI_MONITOR_NUM
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SOC_ADC_SAMPLE_FREQ_THRES_HIGH
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SOC_ADC_SAMPLE_FREQ_THRES_LOW
RTC
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SOC_ADC_RTC_MIN_BITWIDTH
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SOC_ADC_RTC_MAX_BITWIDTH
ADC power control is shared by PWDET
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SOC_ADC_SHARED_POWER
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SOC_SHARED_IDCACHE_SUPPORTED
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SOC_IDCACHE_PER_CORE
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SOC_CPU_CORES_NUM
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SOC_CPU_INTR_NUM
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SOC_CPU_HAS_FPU
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SOC_HP_CPU_HAS_MULTIPLE_CORES
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SOC_CPU_BREAKPOINTS_NUM
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SOC_CPU_WATCHPOINTS_NUM
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SOC_CPU_WATCHPOINT_MAX_REGION_SIZE
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SOC_DAC_CHAN_NUM
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SOC_DAC_RESOLUTION
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SOC_DAC_DMA_16BIT_ALIGN
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SOC_GPIO_PORT
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SOC_GPIO_PIN_COUNT
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SOC_GPIO_VALID_GPIO_MASK
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SOC_GPIO_VALID_OUTPUT_GPIO_MASK
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SOC_GPIO_IN_RANGE_MAX
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SOC_GPIO_OUT_RANGE_MAX
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SOC_GPIO_VALID_DIGITAL_IO_PAD_MASK
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SOC_GPIO_CLOCKOUT_BY_IO_MUX
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SOC_GPIO_CLOCKOUT_CHANNEL_NUM
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SOC_GPIO_SUPPORT_HOLD_IO_IN_DSLP
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SOC_I2C_NUM
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SOC_HP_I2C_NUM
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SOC_I2C_FIFO_LEN
I2C hardware FIFO depth
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SOC_I2C_CMD_REG_NUM
Number of I2C command registers
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SOC_I2C_SUPPORT_SLAVE
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SOC_I2C_SUPPORT_APB
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SOC_I2C_STOP_INDEPENDENT
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SOC_I2S_NUM
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SOC_I2S_HW_VERSION_1
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SOC_I2S_SUPPORTS_APLL
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SOC_I2S_SUPPORTS_PLL_F160M
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SOC_I2S_SUPPORTS_PDM
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SOC_I2S_SUPPORTS_PDM_TX
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SOC_I2S_PDM_MAX_TX_LINES
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SOC_I2S_SUPPORTS_PDM_RX
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SOC_I2S_PDM_MAX_RX_LINES
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SOC_I2S_SUPPORTS_ADC_DAC
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SOC_I2S_SUPPORTS_ADC
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SOC_I2S_SUPPORTS_DAC
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SOC_I2S_SUPPORTS_LCD_CAMERA
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SOC_I2S_MAX_DATA_WIDTH
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SOC_I2S_TRANS_SIZE_ALIGN_WORD
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SOC_I2S_LCD_I80_VARIANT
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SOC_LCD_I80_SUPPORTED
Intel 8080 LCD is supported
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SOC_LCD_I80_BUSES
Both I2S0/1 have LCD mode
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SOC_LCD_I80_BUS_WIDTH
Intel 8080 bus width
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SOC_LEDC_HAS_TIMER_SPECIFIC_MUX
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SOC_LEDC_SUPPORT_APB_CLOCK
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SOC_LEDC_SUPPORT_REF_TICK
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SOC_LEDC_SUPPORT_HS_MODE
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SOC_LEDC_TIMER_NUM
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SOC_LEDC_CHANNEL_NUM
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SOC_LEDC_TIMER_BIT_WIDTH
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SOC_MCPWM_GROUPS
2 MCPWM groups on the chip (i.e., the number of independent MCPWM peripherals)
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SOC_MCPWM_TIMERS_PER_GROUP
The number of timers that each group has.
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SOC_MCPWM_OPERATORS_PER_GROUP
The number of operators that each group has.
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SOC_MCPWM_COMPARATORS_PER_OPERATOR
The number of comparators that each operator has.
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SOC_MCPWM_GENERATORS_PER_OPERATOR
The number of generators that each operator has.
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SOC_MCPWM_TRIGGERS_PER_OPERATOR
The number of triggers that each operator has.
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SOC_MCPWM_GPIO_FAULTS_PER_GROUP
The number of GPIO fault signals that each group has.
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SOC_MCPWM_CAPTURE_TIMERS_PER_GROUP
The number of capture timers that each group has.
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SOC_MCPWM_CAPTURE_CHANNELS_PER_TIMER
The number of capture channels that each capture timer has.
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SOC_MCPWM_GPIO_SYNCHROS_PER_GROUP
The number of GPIO synchros that each group has.
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SOC_MMU_PERIPH_NUM
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SOC_MMU_LINEAR_ADDRESS_REGION_NUM
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SOC_MPU_CONFIGURABLE_REGIONS_SUPPORTED
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SOC_MPU_MIN_REGION_SIZE
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SOC_MPU_REGIONS_MAX_NUM
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SOC_MPU_REGION_RO_SUPPORTED
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SOC_MPU_REGION_WO_SUPPORTED
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SOC_PCNT_GROUPS
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SOC_PCNT_UNITS_PER_GROUP
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SOC_PCNT_CHANNELS_PER_UNIT
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SOC_PCNT_THRES_POINT_PER_UNIT
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SOC_RMT_GROUPS
One RMT group
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SOC_RMT_TX_CANDIDATES_PER_GROUP
Number of channels that capable of Transmit in each group
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SOC_RMT_RX_CANDIDATES_PER_GROUP
Number of channels that capable of Receive in each group
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SOC_RMT_CHANNELS_PER_GROUP
Total 8 channels
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SOC_RMT_MEM_WORDS_PER_CHANNEL
Each channel owns 64 words memory
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SOC_RMT_SUPPORT_REF_TICK
Support set REF_TICK as the RMT clock source
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SOC_RMT_SUPPORT_APB
Support set APB as the RMT clock source
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SOC_RMT_CHANNEL_CLK_INDEPENDENT
Can select different source clock for each channel
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SOC_RTCIO_PIN_COUNT
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SOC_RTCIO_INPUT_OUTPUT_SUPPORTED
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SOC_RTCIO_HOLD_SUPPORTED
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SOC_RTCIO_WAKE_SUPPORTED
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SOC_SDM_GROUPS
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SOC_SDM_CHANNELS_PER_GROUP
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SOC_SDM_CLK_SUPPORT_APB
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SOC_SPI_HD_BOTH_INOUT_SUPPORTED
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SOC_SPI_AS_CS_SUPPORTED
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SOC_SPI_PERIPH_NUM
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SOC_SPI_DMA_CHAN_NUM
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SOC_SPI_PERIPH_CS_NUM(i)
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SOC_SPI_MAX_CS_NUM
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SOC_SPI_SUPPORT_CLK_APB
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SOC_SPI_MAXIMUM_BUFFER_SIZE
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SOC_SPI_MAX_PRE_DIVIDER
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SOC_MEMSPI_SRC_FREQ_80M_SUPPORTED
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SOC_MEMSPI_SRC_FREQ_40M_SUPPORTED
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SOC_MEMSPI_SRC_FREQ_26M_SUPPORTED
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SOC_MEMSPI_SRC_FREQ_20M_SUPPORTED
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SOC_SPI_PERIPH_SUPPORT_MULTILINE_MODE(spi_host)
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SOC_TIMER_GROUPS
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SOC_TIMER_GROUP_TIMERS_PER_GROUP
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SOC_TIMER_GROUP_COUNTER_BIT_WIDTH
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SOC_TIMER_GROUP_TOTAL_TIMERS
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SOC_TIMER_GROUP_SUPPORT_APB
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SOC_TOUCH_SENSOR_VERSION
Hardware version of touch sensor
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SOC_TOUCH_SENSOR_NUM
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SOC_TOUCH_SAMPLE_CFG_NUM
The sample configuration number in total, each sampler can be used to sample on one frequency
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SOC_TWAI_CONTROLLER_NUM
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SOC_TWAI_BRP_MIN
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SOC_TWAI_BRP_MAX
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SOC_TWAI_CLK_SUPPORT_APB
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SOC_TWAI_SUPPORT_MULTI_ADDRESS_LAYOUT
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SOC_UART_NUM
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SOC_UART_HP_NUM
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SOC_UART_SUPPORT_APB_CLK
Support APB as the clock source
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SOC_UART_SUPPORT_REF_TICK
Support REF_TICK as the clock source
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SOC_UART_FIFO_LEN
The UART hardware FIFO length
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SOC_UART_BITRATE_MAX
Max bit rate supported by UART
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SOC_SPIRAM_SUPPORTED
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SOC_SPI_MEM_SUPPORT_CONFIG_GPIO_BY_EFUSE
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SOC_SHA_SUPPORT_PARALLEL_ENG
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SOC_SHA_ENDIANNESS_BE
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SOC_SHA_SUPPORT_SHA1
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SOC_SHA_SUPPORT_SHA256
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SOC_SHA_SUPPORT_SHA384
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SOC_SHA_SUPPORT_SHA512
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SOC_MPI_MEM_BLOCKS_NUM
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SOC_MPI_OPERATIONS_NUM
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SOC_RSA_MAX_BIT_LEN
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SOC_AES_SUPPORT_AES_128
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SOC_AES_SUPPORT_AES_192
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SOC_AES_SUPPORT_AES_256
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SOC_SECURE_BOOT_V1
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SOC_EFUSE_SECURE_BOOT_KEY_DIGESTS
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SOC_FLASH_ENCRYPTED_XTS_AES_BLOCK_MAX
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SOC_PHY_DIG_REGS_MEM_SIZE
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SOC_PM_SUPPORT_EXT0_WAKEUP
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SOC_PM_SUPPORT_EXT1_WAKEUP
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SOC_PM_SUPPORT_EXT_WAKEUP
Compatible to the old version of IDF
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SOC_PM_SUPPORT_TOUCH_SENSOR_WAKEUP
Supports waking up from touch pad trigger
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SOC_PM_SUPPORT_RTC_PERIPH_PD
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SOC_PM_SUPPORT_RTC_FAST_MEM_PD
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SOC_PM_SUPPORT_RTC_SLOW_MEM_PD
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SOC_PM_SUPPORT_RC_FAST_PD
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SOC_PM_SUPPORT_VDDSDIO_PD
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SOC_PM_SUPPORT_MODEM_PD
Modem here includes wifi and btdm
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SOC_CONFIGURABLE_VDDSDIO_SUPPORTED
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SOC_PM_MODEM_PD_BY_SW
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SOC_CLK_APLL_SUPPORTED
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SOC_CLK_RC_FAST_D256_SUPPORTED
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SOC_RTC_SLOW_CLK_SUPPORT_RC_FAST_D256
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SOC_CLK_RC_FAST_SUPPORT_CALIBRATION
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SOC_CLK_XTAL32K_SUPPORTED
Support to connect an external low frequency crystal
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SOC_CLK_LP_FAST_SUPPORT_XTAL_D4
Support XTAL_D4 clock as the LP_FAST clock source
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SOC_SDMMC_USE_IOMUX
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SOC_SDMMC_NUM_SLOTS
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SOC_WIFI_WAPI_SUPPORT
Support WAPI
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SOC_WIFI_CSI_SUPPORT
Support CSI
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SOC_WIFI_MESH_SUPPORT
Support WIFI MESH
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SOC_WIFI_SUPPORT_VARIABLE_BEACON_WINDOW
Support delta early time for rf phy on/off
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SOC_WIFI_NAN_SUPPORT
Support WIFI Aware (NAN)
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SOC_BLE_SUPPORTED
Support Bluetooth Low Energy hardware
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SOC_BLE_MESH_SUPPORTED
Support BLE MESH
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SOC_BT_CLASSIC_SUPPORTED
Support Bluetooth Classic hardware
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SOC_BLE_DEVICE_PRIVACY_SUPPORTED
Support BLE device privacy mode
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SOC_BLUFI_SUPPORTED
Support BLUFI
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SOC_BT_H2C_ENC_KEY_CTRL_ENH_VSC_SUPPORTED
Support Bluetooth Classic encryption key size configuration through vendor-specific HCI command
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SOC_ULP_HAS_ADC
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SOC_PHY_COMBO_MODULE
Support Wi-Fi, BT and BLE
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SOC_EMAC_RMII_CLK_OUT_INTERNAL_LOOPBACK
REF RMII CLK output is looped back internally