ESP32-P4

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Note

This document is automatically translated using AI. Please excuse any detailed errors. The official English version is still in progress.

ESP32-P4 Chip Startup Conditions

The operating voltage range of the ESP32-P4 chip is 3.0 V ~ 3.6 V; when using a single power supply, it is recommended that the power supply voltage for the ESP32-P4 series chip be 3.3 V, and the basic supply current for the ESP32-P4 chip should be at least 380 mA (including Flash and PSRAM). For more power design instructions, see: Key Points of ESP32-P4 Power Design. The CHIP_PU (EN) pin of ESP32-P4 is the chip’s boot pin. When CHIP_PU (EN) is at a high level, the chip is enabled; when it is at a low level, the chip is turned off. Note: The CHIP_PU pin should not be left floating. When ESP32-P4 is powered by a 3.3V system power supply, the CHIP_PU (EN) pin must be at a high level.

Hardware Wiring

To perform firmware downloads using the ESP32-P4 chip, users need to design their own PCB board and reserve test points for firmware download. Then, wiring should be done according to the requirements for the chip to enter download mode.

The ESP32-P4 supports UART0 and USB download schemes. The Strapping pin requirements when the chip enters the Joint Download mode are as follows:

  • When downloading firmware based on ESP32-P4 via UART0, users need to prepare:

    • 3.3V Power Supply

    • Serial debugging tool

    • Dupont wire

    power uart en

    When using the UART0 pin to download firmware, the following wiring conditions need to be met to satisfy the hardware requirements for chip power supply, power-on startup, and entering download mode.

    ESP32-P4

    3.3V External Power Supply

    Serial debugging tool

    3V3

    VDD

    GND

    GND

    GND

    EN

    VDD

    GPIO35 (pull-down, default is weak pull-up)

    GND

    GPIO36 (pull-up, default is floating)

    VDD

    TXD0（GPIO37）

    RXD

    RXD0（GPIO38）

    TXD

  • When downloading firmware based on ESP32-P4 via USB, users need to prepare:

    • 3.3V Power Supply

    • USB cable

    • Dupont wire

    power usb en

The ESP32-P4 has 3 USB controllers, with a total of 6 USB signal pins. By default, the USB pin mapping is as follows:

Controller

Default D-

Default D+ pin

Rate

Typical use

USB Serial/JTAG

GPIO24

GPIO25

FS 12 Mbps

Flashing, CDC Serial Port, JTAG

USB 2.0 Full Speed OTG

GPIO26

GPIO27

FS 12 Mbps

USB device/host applications (firmware download not supported)

USB 2.0 High Speed OTG

USB_DM

USB_DP

HS 480 Mbps

High-speed Device/Host: Only full-speed burning is used during download

Note

  • The chip internally has two full-speed PHYs, under default conditions:

    • GPIO24 & GPIO25 correspond to FS_PHY1 connecting to USB serial/JTAG, supporting firmware download;

    • GPIO26 & GPIO27 correspond to FS_PHY2 connecting to USB 2.0 full-speed OTG, firmware download is not supported.

  • If it is necessary to use the GPIO26 & GPIO27 pin set for firmware download, the chip eFuse bit EFUSE_USB_PHY_SEL must be written as 1, swapping the two full-speed PHYs, i.e., using GPIO26 & GPIO27 as USB serial/JTAG pins for firmware download.

    espefuse.py -p COM* burn_efuse USB_PHY_SEL 1

After writing EFUSE_USB_PHY_SEL as 1, that is:

  • GPIO26 & GPIO27 correspond to FS_PHY1 connecting to USB serial port/JTAG, supporting firmware download;

  • GPIO24 & GPIO25 correspond to FS_PHY2 connecting to USB 2.0 full-speed OTG, firmware download is not supported.

  • When using USB UART/JTAG and USB 2.0 full-speed OTG simultaneously, the two sets of GPIO must be occupied separately.

When using USB Serial/JTAG to download firmware, it defaults to connect GPIO24 and GPIO25. The following wiring conditions need to be met to satisfy the hardware requirements for chip power supply, power-on startup, and entering download mode.

ESP32-P4

3.3V External Power Supply

USB cable

3V3

VDD

GND

GND

GND

EN

VDD

GPIO35 (pull-down, default is weak pull-up)

GND

GPIO36 (pull-up, default is floating)

VDD

GPIO24 (optional GPIO26)

USB_D- (White)

GPIO25 (optional GPIO27)

USB_D+ (Green)

  • If it is necessary to use the GPIO26 and GPIO27 pin set to download the firmware, this can be achieved by writing the chip eFuse bit EFUSE_USB_PHY_SEL as 1, swapping the two full-speed PHYs, i.e., using GPIO26 & GPIO27 as USB serial/JTAG pins for firmware download.

    espefuse.py -p COM* burn_efuse USB_PHY_SEL 1

After writing EFUSE_USB_PHY_SEL as 1, that is:

  • GPIO26 & GPIO27 correspond to FS_PHY1 connecting to USB serial port/JTAG, supporting firmware download;

  • GPIO24 & GPIO25 correspond to FS_PHY2 connecting to USB 2.0 full-speed OTG, firmware download is not supported.

  • Explanation of the USB efuse bit for the chip:

    usb efuse

    • DIS_USB_JTAG : When set to 1, the USB Serial/JTAG controller is disabled. That is, the USB Serial/JTAG debugging function is not available.

    • USB_PHY_SEL : When set to 1, it swaps the two full-speed PHYs, i.e., GPIO26 & GPIO27 correspond to FS_PHY1 for USB serial/JTAG; GPIO24 & GPIO25 correspond to FS_PHY2 for USB 2.0 full-speed OTG.

    • DIS_USB_OTG_DOWNLOAD_MODE : When set to 1, it disables the USB 2.0 high-speed OTG pins (USB_DM / USB_DP) for firmware download.

    • DIS_USB_SERIAL_JTAG_ROM_PRINT : When set to 1, it disables the USB serial/JTAG controller for ROM Code log printing.

    • DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE : When set to 1, it disables the USB Serial/JTAG controller for firmware download.

    • USB_DEVICE_EXCHG_PINS : When set to 1, it swaps the D+ and D- pins of the USB serial/JTAG controller.

    • USB_OTG11_EXCHG_PINS : When set to 1, it swaps the D+ and D- pins of the USB 2.0 full-speed OTG controller.

When using USB 2.0 High-Speed OTG to download firmware, it is necessary to connect to the dedicated USB_DM / USB_DP pins. The following wiring conditions need to be met to satisfy the hardware requirements for chip power supply, power-on startup, and entering download mode.

ESP32-P4

3.3V External Power Supply

USB cable

3V3

VDD

GND

GND

GND

EN

VDD

GPIO35 (pull-down, default is weak pull-up)

GND

GPIO36 (pull-up, default is floating)

VDD

USB_DM

USB_D- (White)

USB_DP

USB_D+ (Green)

Note

  • USB_DM / USB_DP are dedicated USB pins powered by VDD_USBPHY, and cannot be rerouted to GPIO24~27.

  • You can use ESP-IDF’s idf.py dfu / idf.py dfu-flash for DFU flashing; each DFU requires manual entry into download mode.

  • After enabling secure boot or Flash encryption, the USB-OTG protocol stack in the ROM will be shut down, and this port can no longer be updated via a simulated serial port or DFU.

  • When testing with the ESP32-P4X-Function-EV-Board, you can directly use a USB Type-C cable to connect to the USB-UART interface on the development board for firmware download. If you are using the USB interface to download the firmware for the first time, you need to manually pull down the GPIO35 pin, that is, hold down the Boot button and then power on, to manually enter the download mode.

Chip Power-On Startup Log

After powering on the ESP32-P4 chip, you can use the PC-side serial debugging software (such as XCOM) to view the UART0 serial output when the chip is powered on, to confirm whether the chip has entered download mode. If the chip enters download mode upon power-up, UART0 will print the following log:

ESP-ROM:esp32p4-eco1-20240205
Build:Feb  5 2024
rst:0x1 (POWERON),boot:0x107 (DOWNLOAD(USB/UART0/SPI))
waiting for download
p4 boot log

Note

  • After powering on the ESP32-P4 chip, if you do not see the log printing, you can trigger the log printing by pulling down and then pulling up the CHIP_PU (EN) pin for a hardware reset restart.

  • In addition, you can get the Strapping pins level state at power-on from the chip power-on startup log. For detailed instructions, please refer to ESP32-P4 Boot Log instructions.

In terms of software, Espressif provides a PC-based Flash download tool, which can directly download firmware (.bin) into Flash. For usage instructions, refer to the Flash Download Tool User Guide.

flash download tool

After the firmware download is complete, if you want to run the burned firmware, you can pull up GPIO35 (default is high level) based on the aforementioned hardware wiring, and then pull down and pull up the CHIP_PU (EN) pin for hardware reset and restart, allowing the chip to re-enter the Flash boot mode. Finally, use the serial debugging software to view the UART0 log printout to check the firmware running status.