SoC Capabilities
This section lists the macro definitions of the ESP32-C61's SoC hardware capabilities. These macros are commonly used by conditional-compilation directives (e.g., #if
) in ESP-IDF to determine which hardware-dependent features are supported, thus control what portions of code are compiled.
Warning
These macro definitions are currently not considered to be part of the public API, and may be changed in a breaking manner (see ESP-IDF Versions for more details).
API Reference
Header File
This header file can be included with:
#include "soc/soc_caps.h"
Macros
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SOC_ADC_SUPPORTED
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SOC_DEDICATED_GPIO_SUPPORTED
-
SOC_UART_SUPPORTED
-
SOC_GDMA_SUPPORTED
-
SOC_AHB_GDMA_SUPPORTED
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SOC_GPTIMER_SUPPORTED
-
SOC_BT_SUPPORTED
-
SOC_USB_SERIAL_JTAG_SUPPORTED
-
SOC_ASYNC_MEMCPY_SUPPORTED
-
SOC_TEMP_SENSOR_SUPPORTED
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SOC_PHY_SUPPORTED
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SOC_WIFI_SUPPORTED
-
SOC_SUPPORTS_SECURE_DL_MODE
-
SOC_EFUSE_KEY_PURPOSE_FIELD
-
SOC_EFUSE_SUPPORTED
-
SOC_I2S_SUPPORTED
-
SOC_GPSPI_SUPPORTED
-
SOC_I2C_SUPPORTED
-
SOC_LEDC_SUPPORTED
-
SOC_SYSTIMER_SUPPORTED
-
SOC_SHA_SUPPORTED
-
SOC_ECC_SUPPORTED
-
SOC_ECC_EXTENDED_MODES_SUPPORTED
-
SOC_FLASH_ENC_SUPPORTED
-
SOC_SECURE_BOOT_SUPPORTED
-
SOC_BOD_SUPPORTED
-
SOC_APM_SUPPORTED
Support for APM peripheral
-
SOC_PMU_SUPPORTED
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SOC_LP_TIMER_SUPPORTED
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SOC_LP_AON_SUPPORTED
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SOC_CLK_TREE_SUPPORTED
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SOC_WDT_SUPPORTED
-
SOC_SPI_FLASH_SUPPORTED
-
SOC_MODEM_CLOCK_SUPPORTED
-
SOC_REG_I2C_SUPPORTED
-
SOC_ETM_SUPPORTED
-
SOC_PAU_SUPPORTED
-
SOC_LIGHT_SLEEP_SUPPORTED
-
SOC_DEEP_SLEEP_SUPPORTED
-
SOC_PM_SUPPORTED
-
SOC_ECDSA_SUPPORTED
-
SOC_SPIRAM_SUPPORTED
-
SOC_XTAL_SUPPORT_40M
-
SOC_ADC_DIG_CTRL_SUPPORTED
< SAR ADC Module
-
SOC_ADC_DIG_IIR_FILTER_SUPPORTED
-
SOC_ADC_MONITOR_SUPPORTED
-
SOC_ADC_DIG_SUPPORTED_UNIT(UNIT)
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SOC_ADC_DMA_SUPPORTED
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SOC_ADC_PERIPH_NUM
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SOC_ADC_MAX_CHANNEL_NUM
-
SOC_ADC_CHANNEL_NUM(PERIPH_NUM)
-
SOC_ADC_ATTEN_NUM
Digital
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SOC_ADC_DIGI_CONTROLLER_NUM
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SOC_ADC_PATT_LEN_MAX
Two pattern tables, each contains 4 items. Each item takes 1 byte
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SOC_ADC_DIGI_MAX_BITWIDTH
-
SOC_ADC_DIGI_MIN_BITWIDTH
-
SOC_ADC_DIGI_IIR_FILTER_NUM
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SOC_ADC_DIGI_MONITOR_NUM
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SOC_ADC_DIGI_RESULT_BYTES
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SOC_ADC_DIGI_DATA_BYTES_PER_CONV
F_sample = F_digi_con / 2 / interval. F_digi_con = 5M for now. 30 <= interval <= 4095
-
SOC_ADC_SAMPLE_FREQ_THRES_HIGH
-
SOC_ADC_SAMPLE_FREQ_THRES_LOW
RTC
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SOC_ADC_RTC_MIN_BITWIDTH
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SOC_ADC_RTC_MAX_BITWIDTH
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SOC_ADC_TEMPERATURE_SHARE_INTR
< Calibration / // TODO: [ESP32C61] IDF-9303 #define SOC_ADC_CALIBRATION_V1_SUPPORTED (1) /!< support HW offset calibration version 1*/ #define SOC_ADC_SELF_HW_CALI_SUPPORTED (1) /*!< support HW offset self calibration / #define SOC_ADC_CALIB_CHAN_COMPENS_SUPPORTED (1) /!< support channel compensation to the HW offset calibration */
/*!< Interrupt ADC power control is shared by PWDET
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SOC_ADC_SHARED_POWER
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SOC_APB_BACKUP_DMA
-
SOC_BROWNOUT_RESET_SUPPORTED
-
SOC_RNG_SUPPORTED
-
SOC_SHARED_IDCACHE_SUPPORTED
-
SOC_CACHE_WRITEBACK_SUPPORTED
-
SOC_CACHE_FREEZE_SUPPORTED
-
SOC_CPU_CORES_NUM
-
SOC_CPU_INTR_NUM
-
SOC_CPU_HAS_FLEXIBLE_INTC
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SOC_INT_PLIC_SUPPORTED
-
SOC_INT_CLIC_SUPPORTED
-
SOC_INT_HW_NESTED_SUPPORTED
-
SOC_BRANCH_PREDICTOR_SUPPORTED
-
SOC_CPU_BREAKPOINTS_NUM
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SOC_CPU_WATCHPOINTS_NUM
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SOC_CPU_WATCHPOINT_MAX_REGION_SIZE
-
SOC_CPU_HAS_PMA
-
SOC_CPU_IDRAM_SPLIT_USING_PMP
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SOC_CPU_PMP_REGION_GRANULARITY
-
SOC_CPU_HAS_LOCKUP_RESET
-
SOC_DMA_CAN_ACCESS_FLASH
DMA can access Flash memory
-
SOC_AHB_GDMA_VERSION
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SOC_GDMA_NUM_GROUPS_MAX
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SOC_GDMA_PAIRS_PER_GROUP_MAX
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SOC_GDMA_SUPPORT_ETM
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SOC_GDMA_SUPPORT_SLEEP_RETENTION
-
SOC_ETM_GROUPS
-
SOC_ETM_CHANNELS_PER_GROUP
-
SOC_ETM_SUPPORT_SLEEP_RETENTION
-
SOC_GPIO_PORT
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SOC_GPIO_PIN_COUNT
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SOC_GPIO_SUPPORT_PIN_GLITCH_FILTER
-
SOC_GPIO_SUPPORT_PIN_HYS_FILTER
-
SOC_GPIO_SUPPORT_ETM
-
SOC_GPIO_SUPPORT_RTC_INDEPENDENT
-
SOC_LP_IO_CLOCK_IS_INDEPENDENT
-
SOC_GPIO_VALID_GPIO_MASK
-
SOC_GPIO_VALID_OUTPUT_GPIO_MASK
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SOC_GPIO_IN_RANGE_MAX
-
SOC_GPIO_OUT_RANGE_MAX
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SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP
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SOC_GPIO_DEEP_SLEEP_WAKE_VALID_GPIO_MASK
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SOC_GPIO_DEEP_SLEEP_WAKE_SUPPORTED_PIN_CNT
-
SOC_GPIO_VALID_DIGITAL_IO_PAD_MASK
-
SOC_GPIO_SUPPORT_FORCE_HOLD
-
SOC_GPIO_SUPPORT_HOLD_IO_IN_DSLP
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SOC_GPIO_SUPPORT_HOLD_SINGLE_IO_IN_DSLP
-
SOC_GPIO_CLOCKOUT_CHANNEL_NUM
-
SOC_RTCIO_PIN_COUNT
-
SOC_RTCIO_INPUT_OUTPUT_SUPPORTED
-
SOC_RTCIO_HOLD_SUPPORTED
-
SOC_RTCIO_WAKE_SUPPORTED
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SOC_DEDIC_GPIO_OUT_CHANNELS_NUM
8 outward channels on each CPU core
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SOC_DEDIC_GPIO_IN_CHANNELS_NUM
8 inward channels on each CPU core
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SOC_DEDIC_PERIPH_ALWAYS_ENABLE
The dedicated GPIO (a.k.a. fast GPIO) is featured by some customized CPU instructions, which is always enabled
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SOC_I2C_NUM
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SOC_HP_I2C_NUM
-
SOC_I2C_FIFO_LEN
I2C hardware FIFO depth
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SOC_I2C_CMD_REG_NUM
Number of I2C command registers
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SOC_I2C_SUPPORT_SLAVE
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SOC_I2C_SUPPORT_HW_FSM_RST
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SOC_I2C_SUPPORT_XTAL
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SOC_I2C_SUPPORT_RTC
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SOC_I2C_SUPPORT_10BIT_ADDR
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SOC_I2C_SLAVE_SUPPORT_BROADCAST
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SOC_I2C_SLAVE_CAN_GET_STRETCH_CAUSE
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SOC_I2C_SLAVE_SUPPORT_I2CRAM_ACCESS
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SOC_I2C_SLAVE_SUPPORT_SLAVE_UNMATCH
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SOC_I2C_SUPPORT_SLEEP_RETENTION
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SOC_I2S_NUM
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SOC_I2S_HW_VERSION_2
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SOC_I2S_SUPPORTS_ETM
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SOC_I2S_SUPPORTS_TX_SYNC_CNT
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SOC_I2S_SUPPORTS_XTAL
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SOC_I2S_SUPPORTS_PLL_F160M
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SOC_I2S_SUPPORTS_PLL_F120M
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SOC_I2S_SUPPORTS_PCM
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SOC_I2S_SUPPORTS_PDM
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SOC_I2S_SUPPORTS_PDM_TX
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SOC_I2S_PDM_MAX_TX_LINES
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SOC_I2S_SUPPORTS_TDM
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SOC_I2S_SUPPORT_SLEEP_RETENTION
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SOC_LEDC_SUPPORT_PLL_DIV_CLOCK
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SOC_LEDC_SUPPORT_XTAL_CLOCK
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SOC_LEDC_TIMER_NUM
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SOC_LEDC_CHANNEL_NUM
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SOC_LEDC_TIMER_BIT_WIDTH
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SOC_LEDC_SUPPORT_FADE_STOP
-
SOC_LEDC_GAMMA_CURVE_FADE_SUPPORTED
-
SOC_LEDC_GAMMA_CURVE_FADE_RANGE_MAX
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SOC_LEDC_FADE_PARAMS_BIT_WIDTH
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SOC_LEDC_SUPPORT_SLEEP_RETENTION
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SOC_MMU_PAGE_SIZE_CONFIGURABLE
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SOC_MMU_PAGE_SIZE_8KB_SUPPORTED
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SOC_MMU_PERIPH_NUM
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SOC_MMU_LINEAR_ADDRESS_REGION_NUM
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SOC_MMU_DI_VADDR_SHARED
D/I vaddr are shared
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SOC_MPU_CONFIGURABLE_REGIONS_SUPPORTED
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SOC_MPU_MIN_REGION_SIZE
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SOC_MPU_REGIONS_MAX_NUM
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SOC_MPU_REGION_RO_SUPPORTED
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SOC_MPU_REGION_WO_SUPPORTED
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SOC_SHA_DMA_MAX_BUFFER_SIZE
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SOC_SHA_SUPPORT_DMA
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SOC_SHA_SUPPORT_RESUME
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SOC_SHA_GDMA
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SOC_SHA_SUPPORT_SHA1
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SOC_SHA_SUPPORT_SHA224
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SOC_SHA_SUPPORT_SHA256
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SOC_ECC_CONSTANT_TIME_POINT_MUL
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SOC_ECDSA_SUPPORT_EXPORT_PUBKEY
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SOC_ECDSA_SUPPORT_DETERMINISTIC_MODE
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SOC_SPI_PERIPH_NUM
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SOC_SPI_PERIPH_CS_NUM(i)
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SOC_SPI_MAX_CS_NUM
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SOC_SPI_MAX_PRE_DIVIDER
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SOC_SPI_MAXIMUM_BUFFER_SIZE
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SOC_SPI_SUPPORT_SLAVE_HD_VER2
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SOC_SPI_SUPPORT_SLEEP_RETENTION
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SOC_SPI_SUPPORT_CLK_XTAL
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SOC_SPI_SUPPORT_CLK_PLL
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SOC_SPI_SUPPORT_CLK_RC_FAST
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SOC_SPI_PERIPH_SUPPORT_MULTILINE_MODE(host_id)
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SOC_MEMSPI_IS_INDEPENDENT
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SOC_SPIRAM_XIP_SUPPORTED
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SOC_SPI_MEM_SUPPORT_AUTO_WAIT_IDLE
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SOC_SPI_MEM_SUPPORT_AUTO_SUSPEND
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SOC_SPI_MEM_SUPPORT_AUTO_RESUME
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SOC_SPI_MEM_SUPPORT_IDLE_INTR
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SOC_SPI_MEM_SUPPORT_SW_SUSPEND
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SOC_SPI_MEM_SUPPORT_CHECK_SUS
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SOC_SPI_MEM_SUPPORT_WRAP
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SOC_MEMSPI_SRC_FREQ_80M_SUPPORTED
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SOC_MEMSPI_SRC_FREQ_40M_SUPPORTED
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SOC_MEMSPI_SRC_FREQ_20M_SUPPORTED
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SOC_MEMSPI_FLASH_CLK_SRC_IS_INDEPENDENT
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SOC_SYSTIMER_COUNTER_NUM
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SOC_SYSTIMER_ALARM_NUM
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SOC_SYSTIMER_BIT_WIDTH_LO
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SOC_SYSTIMER_BIT_WIDTH_HI
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SOC_SYSTIMER_FIXED_DIVIDER
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SOC_SYSTIMER_SUPPORT_RC_FAST
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SOC_SYSTIMER_INT_LEVEL
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SOC_SYSTIMER_ALARM_MISS_COMPENSATE
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SOC_SYSTIMER_SUPPORT_ETM
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SOC_LP_TIMER_BIT_WIDTH_LO
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SOC_LP_TIMER_BIT_WIDTH_HI
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SOC_TIMER_GROUPS
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SOC_TIMER_GROUP_TIMERS_PER_GROUP
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SOC_TIMER_GROUP_TOTAL_TIMERS
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SOC_TIMER_GROUP_COUNTER_BIT_WIDTH
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SOC_TIMER_GROUP_SUPPORT_XTAL
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SOC_TIMER_GROUP_SUPPORT_RC_FAST
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SOC_TIMER_SUPPORT_SLEEP_RETENTION
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SOC_TIMER_SUPPORT_ETM
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SOC_MWDT_SUPPORT_SLEEP_RETENTION
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SOC_EFUSE_DIS_DOWNLOAD_ICACHE
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SOC_EFUSE_DIS_PAD_JTAG
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SOC_EFUSE_DIS_USB_JTAG
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SOC_EFUSE_DIS_DIRECT_BOOT
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SOC_EFUSE_SOFT_DIS_JTAG
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SOC_EFUSE_DIS_ICACHE
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SOC_EFUSE_ECDSA_KEY
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SOC_SECURE_BOOT_V2_RSA
-
SOC_SECURE_BOOT_V2_ECC
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SOC_EFUSE_SECURE_BOOT_KEY_DIGESTS
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SOC_EFUSE_REVOKE_BOOT_KEY_DIGESTS
-
SOC_SUPPORT_SECURE_BOOT_REVOKE_KEY
-
SOC_FLASH_ENCRYPTED_XTS_AES_BLOCK_MAX
-
SOC_FLASH_ENCRYPTION_XTS_AES
-
SOC_FLASH_ENCRYPTION_XTS_AES_128
-
SOC_APM_CTRL_FILTER_SUPPORTED
Support for APM control filter
-
SOC_CRYPTO_DPA_PROTECTION_SUPPORTED
-
SOC_UART_NUM
-
SOC_UART_HP_NUM
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SOC_UART_FIFO_LEN
The UART hardware FIFO length
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SOC_UART_BITRATE_MAX
Max bit rate supported by UART
-
SOC_UART_SUPPORT_PLL_F80M_CLK
Support PLL_F80M as the clock source
-
SOC_UART_SUPPORT_RTC_CLK
Support RTC clock as the clock source
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SOC_UART_SUPPORT_XTAL_CLK
Support XTAL clock as the clock source
-
SOC_UART_SUPPORT_WAKEUP_INT
Support UART wakeup interrupt
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SOC_UART_SUPPORT_SLEEP_RETENTION
-
SOC_UART_SUPPORT_FSM_TX_WAIT_SEND
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SOC_COEX_HW_PTI
-
SOC_EXTERNAL_COEX_ADVANCE
HARDWARE ADVANCED EXTERNAL COEXISTENCE CAPS
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SOC_EXTERNAL_COEX_LEADER_TX_LINE
EXTERNAL COEXISTENCE TX LINE CAPS
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SOC_PHY_DIG_REGS_MEM_SIZE
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SOC_WIFI_LIGHT_SLEEP_CLK_WIDTH
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SOC_PM_SUPPORT_WIFI_WAKEUP
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SOC_PM_SUPPORT_BEACON_WAKEUP
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SOC_PM_SUPPORT_BT_WAKEUP
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SOC_PM_SUPPORT_EXT1_WAKEUP
-
SOC_PM_SUPPORT_EXT1_WAKEUP_MODE_PER_PIN
Supports one bit per pin to configure the EXT1 trigger level
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SOC_PM_SUPPORT_CPU_PD
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SOC_PM_SUPPORT_MODEM_PD
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SOC_PM_SUPPORT_XTAL32K_PD
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SOC_PM_SUPPORT_RC32K_PD
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SOC_PM_SUPPORT_RC_FAST_PD
-
SOC_PM_SUPPORT_VDDSDIO_PD
-
SOC_PM_SUPPORT_TOP_PD
-
SOC_PM_SUPPORT_HP_AON_PD
-
SOC_PM_SUPPORT_MAC_BB_PD
-
SOC_PM_SUPPORT_RTC_PERIPH_PD
-
SOC_PM_SUPPORT_PMU_MODEM_STATE
-
MAC_SUPPORT_PMU_MODEM_STATE
-
SOC_PM_CPU_RETENTION_BY_SW
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SOC_PM_MODEM_RETENTION_BY_REGDMA
-
SOC_EXT_MEM_CACHE_TAG_IN_CPU_DOMAIN
-
SOC_PM_MMU_TABLE_RETENTION_WHEN_TOP_PD
-
SOC_PM_PAU_LINK_NUM
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SOC_PM_PAU_REGDMA_LINK_MULTI_ADDR
-
SOC_PM_PAU_REGDMA_LINK_WIFIMAC
-
SOC_PM_PAU_REGDMA_UPDATE_CACHE_BEFORE_WAIT_COMPARE
-
SOC_CLK_RC_FAST_SUPPORT_CALIBRATION
-
SOC_MODEM_CLOCK_IS_INDEPENDENT
-
SOC_CLK_XTAL32K_SUPPORTED
Support to connect an external low frequency crystal
-
SOC_CLK_OSC_SLOW_SUPPORTED
Support to connect an external oscillator, not a crystal
-
SOC_CLK_LP_FAST_SUPPORT_XTAL
Support XTAL clock as the LP_FAST clock source
-
SOC_CLK_LP_FAST_SUPPORT_XTAL_D2
Support XTAL_D2 clock as the LP_FAST clock source
-
SOC_RCC_IS_INDEPENDENT
Reset and Clock Control is independent, thanks to the PCR registers
-
SOC_CLK_ANA_I2C_MST_HAS_ROOT_GATE
Any regi2c operation needs enable the analog i2c master clock first
-
SOC_TEMPERATURE_SENSOR_SUPPORT_FAST_RC
-
SOC_TEMPERATURE_SENSOR_SUPPORT_XTAL
-
SOC_TEMPERATURE_SENSOR_INTR_SUPPORT
-
SOC_TEMPERATURE_SENSOR_SUPPORT_SLEEP_RETENTION
-
SOC_TEMPERATURE_SENSOR_UNDER_PD_TOP_DOMAIN
-
SOC_WIFI_HW_TSF
Support hardware TSF
-
SOC_WIFI_FTM_SUPPORT
Support FTM
-
SOC_WIFI_GCMP_SUPPORT
Support GCMP(GCMP128 and GCMP256)
-
SOC_WIFI_WAPI_SUPPORT
Support WAPI
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SOC_WIFI_CSI_SUPPORT
Support CSI
-
SOC_WIFI_MESH_SUPPORT
Support WIFI MESH
-
SOC_WIFI_HE_SUPPORT
Support Wi-Fi 6
-
SOC_WIFI_MAC_VERSION_NUM
Wi-Fi MAC version num is 3
-
SOC_BLE_SUPPORTED
Support Bluetooth Low Energy hardware
-
SOC_BLE_MESH_SUPPORTED
Support BLE MESH
-
SOC_ESP_NIMBLE_CONTROLLER
Support BLE EMBEDDED controller V1
-
SOC_BLE_50_SUPPORTED
Support Bluetooth 5.0
-
SOC_BLE_DEVICE_PRIVACY_SUPPORTED
Support BLE device privacy mode
-
SOC_BLE_POWER_CONTROL_SUPPORTED
Support Bluetooth Power Control
-
SOC_BLE_PERIODIC_ADV_ENH_SUPPORTED
Support For BLE Periodic Adv Enhancements
-
SOC_BLUFI_SUPPORTED
Support BLUFI
-
SOC_BLE_MULTI_CONN_OPTIMIZATION
Support multiple connections optimization
-
SOC_PHY_COMBO_MODULE
Support Wi-Fi, BLE and 15.4